Ask
Login
TAGGED IN

Digital System Design

Follow this tag to get notifications whenever a new post is added

ALL TAGS
0
votes
1
answer
684
views
1
answer
Carry look ahead adder.
digital system design updated 2.0 years ago by DevarenjiniP • 3.1k
0
votes
1
answer
954
views
1
answer
Draw the data unit for the following RTL description.
digital system design updated 2.1 years ago by pedsangini276 • 4.8k
1
vote
1
answer
14k
views
1
answer
Write a Short Note on Modeling Styles of VHDL.
digital system design updated 2.1 years ago by teamques10 ★ 65k
0
votes
0
answers
6.7k
views
0
answers
(Duplicate) Modelling styles in VHDL
digital system design updated 2.1 years ago by teamques10 ★ 65k
1
vote
1
answer
2.6k
views
1
answer
Draw the standard symbols for ASM charts
digital system design updated 2.1 years ago by teamques10 ★ 65k
1
vote
1
answer
10.0k
views
1
answer
Write VHDL code for 3:8 decoder with active low truth table
digital system design updated 2.1 years ago by sagarkolekar ★ 11k
0
votes
1
answer
8.8k
views
1
answer
Explain what entity in VHDL is?
digital system design updated 2.1 years ago by pedsangini276 • 4.8k
1
vote
1
answer
11k
views
1
answer
Features of VHDL
digital system design updated 2.1 years ago by DevarenjiniP • 3.1k
0
votes
1
answer
551
views
1
answer
3 bit Asynchronous counter.
digital system design updated 2.1 years ago by DevarenjiniP • 3.1k
0
votes
1
answer
12k
views
1
answer
Write a VHDL Code for JK Flip-Flop.
digital system design updated 2.4 years ago by sagarkolekar ★ 11k
1
vote
1
answer
2.8k
views
1
answer
Digital Principles and System Design : Question Paper Dec 2014 - First Year Engineering (Semester 2) | Anna University (AU)
digital system design updated 2.3 years ago by pedsangini276 • 4.8k
0
votes
1
answer
11k
views
1
answer
Design a mealy sequence detector to detect 1010 using D flip-flops & Logic Gates.
digital system design updated 2.3 years ago by pedsangini276 • 4.8k
0
votes
1
answer
1.3k
views
1
answer
Write a note on MSI Asynchronous counter 74LS93
digital system design updated 2.3 years ago by pedsangini276 • 4.8k
0
votes
1
answer
6.7k
views
1
answer
Design a 4 bit Bidirectional Universal MSI Shift Register
digital system design updated 2.3 years ago by pedsangini276 • 4.8k
3
votes
1
answer
3.2k
views
1
answer
Write a Short Note on VHDL.
digital system design updated 2.3 years ago by pedsangini276 • 4.8k
2
votes
1
answer
28k
views
1
answer
Compare Between Concurrent & Sequential Statements
digital system design updated 2.3 years ago by pedsangini276 • 4.8k
0
votes
1
answer
4.4k
views
1
answer
Write a Short Note on Entity & Architecture Declaration of VHDL
digital system design updated 2.3 years ago by pedsangini276 • 4.8k
0
votes
1
answer
13k
views
1
answer
Design a VHDL Code for Multiplexer & Demultiplexer.
digital system design updated 2.3 years ago by pedsangini276 • 4.8k
0
votes
1
answer
1.4k
views
1
answer
Design a VHDL Code for Half Adder.
digital system design updated 2.3 years ago by pedsangini276 • 4.8k
2
votes
1
answer
28k
views
1
answer
Explain Full Adder circuit using PLA having three inputs, 8 product terms and two outputs.
digital system design updated 4.6 years ago by abhishektiwari1 • 100
2
votes
1
answer
4.1k
views
1
answer
Express F in SOP and POS form
digital system design updated 4.6 years ago by abhishektiwari1 • 100
0
votes
1
answer
19k
views
1
answer
Compare TTL and CMOS logic families
digital system design updated 4.6 years ago by abhishektiwari1 • 100
0
votes
1
answer
1.0k
views
1
answer
Using Boolean Algebra, prove the following
digital system design updated 4.6 years ago by abhishektiwari1 • 100
0
votes
1
answer
22k
views
1
answer
Design a 2 bit comparator and implement using logic gates
digital system design updated 4.6 years ago by abhishektiwari1 • 100
0
votes
1
answer
1.2k
views
1
answer
Minimize the expression using Quine Mc-cluskey technique
digital system design updated 4.6 years ago by abhishektiwari1 • 100
<prev • 86 results • page 2 of 4 • next >